Job Description

　　This role will encompass enabling, qualifying, and debugging tools and flow related to the Front End (FE) RTL/pre-silicon logic verification environment on a team focused on pre-silicon logic verification for Intel Technology Research and Development.

　　As a design automation member of the Logic Design and Validation group within the Lead Vehicle Development group in Design Enablement, you will help bring up new tools and flows used by the group to enable RTL development and logic verification for Intel's newest technology. You will be responsible for supporting the FE environment on new and existing projects, troubleshooting tool issues, and supporting the team through development of custom scripts and flows to enable logic verification signoff.

　　You will be responsible for the following tools and flows used across all technologies:

　　Formal version control system based on Git with regular model generation.

　　Nightly logic verification regression system with coverage collection and reporting based on Synopsys tools such as VCS.

　　Functional Equivalence Verification (FEV) regression system using the LEC tool from Cadence.

　　General scripting to enable a high degree of automation and repeatability.

　　The ideal candidate should exhibit the following behavioral traits:

　　Motivated, driven, with sense of urgency and commitment quality results

　　Communication and problem-solving skills

　　Documentation, and presentation skills

　　Troubleshooting and analytical skills

　　This is an entry level position and compensation will be given accordingly.

　　#DesignEnablement

　　Qualifications

　　You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

　　Minimum Qualifications:

　　Candidate must possess a BS degree with 3+ months or experience or MS degree with 6+ months of experience in Computer Science, Computer Engineering, Electrical Engineer, or related field.

　　3+ months of experience in the following:

　　Git revision control system

　　Debugging of Synopsys digital design tools and flows: VCS, Verdi, URG, VC-LP

　　Debugging of Cadence digital design tools and flows: Conformal

　　UNIX shell scripting

　　Perl or Python Scripting

　　Preferred Qualifications:

　　3+ months of experience in the following:

　　Pre-silicon verification using Synopsys VCS or equivalent tool.

　　Pre-silicon verification using OVM/UVM based test benches.

　　Unified Power Format (UPF) specification.

　　Database creation and management.

　　-Exposure to Intel Cheetah (CTH).

　　-Intel Gatekeeper tool

　　Inside this Business Group

　　As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

　　Posting Statement

　　All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

　　Benefits

　　We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

　　Working Model

　　This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.