Job Description

　　Designs complex layouts of analog signal circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts. Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks. Performs the microfloor planning and detail signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance. Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality. Collaborates with analog circuit design, process technology, and package design teams to meet design specifications, plan work, and negotiate layout tradeoffs as needed. Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design.

　　Qualifications

　　Experience of 2 to 5 Yrs

　　Work experience of complex SERDES blocks like CTLE, DCO, DFE,Transmitter and GPIO blocks

　　Handles block layout independently ensuring quality schedule of deliverables. No supervision by lead.

　　Works with lead on full chip layout, floor plan, power grid templates etc

　　Good understanding of RV, ESD and Routing

　　Knows all flows and tools like Virtuoso, ICV, Redhawk, Extraction tools. Can guide others in the team on tools flows.

　　Good knowledge of Rule Decks

　　Shows interest and implements automation ideas

　　Works with DE to identify tasks, does planning and scheduling of the deliverables .

　　Understanding of complex circuits likes ADC, vregs, DACs, current mirrors, PLLs, Chargepumps, amplifiers etc.

　　Educational Qualification Master or Bachelors in EE

　　Preferred Qualifications:

　　Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

　　Inside this Business Group

　　In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

　　Posting Statement

　　All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

　　Benefits

　　We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

　　It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

　　Working Model

　　This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.