Minimum qualifications:

　　Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.

　　10 years of experience in verification of IPs, Subsystems, and SoCs.

　　Experience creating detailed design verification strategies and constraint random verification with SV and UVM.

　　Preferred qualifications:

　　Master's degree in Computer Science or Electrical Engineering.

　　Experience using UVM, System Verilog, and C/C++ for IP or sub system verification.

　　Experienced in ARM or RISC-V CPU based subsystem verification.

　　Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

　　With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

　　Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

　　Work with design verification and other stakeholders to come up with detailed test plans, dependencies, and deliverables.

　　Plan the verification of security design blocks by fully understanding the design specification, security requirements, and interacting with architecture and design engineers to identify important verification scenarios.

　　Work closely with Architecture, software, Security-assurance, design, and backend implementation stakeholders to make technical decisions.

　　Create and enhance constrained-random verification environments using System Verilog and UVM.

　　Be the primary point of contact for functional verification of the IP for cross-functional teams.

　　Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.