Job Description

　　Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in High-Volume Manufacturing (HVM) at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers.

　　This job requisition is to seek a Principal Engineer in the Device Integration team in the FSM HVM Global Yield organization, reporting to the Director of Device Integration Engineering. The selected candidate will own multiple projects in Device Engineering and will lead cross-organizational Task Force Teams, including but not limited to new device characterization, customization and productization, supporting internal and external customers.

　　The Principal Device Integration Engineer’s responsibilities include (but are not limited to):

　　Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.

　　Collaborate with Technology Development team to develop new device technology, customize device architecture per customer request and import to production fabs.

　　Lead a cross-organizational team of engineers to identify root cause of device-related yield/performance issues and define mitigation plan to meet committed production yield/performance targets.

　　Lead a group of device engineers to improve and maintain device performance in a high volume manufacturing environment.

　　Own NPI (New Product Introduction) in production fabs and perform device-related process optimization to meet foundry customers product specifications and requirements.

　　Develop a model to predict device performance accurately in early-to-mid stage of Si progression and drive systematic solution to maintain baseline device performance.

　　Work with Process Integration engineers to drive process simplification and implement cost reduction engineering opportunities in line.

　　Candidate should possess the following behavioral skills:

　　Problem-solving technique with strong self-initiative and self-learning capabilities.

　　Ability to work with multi-functional, multi-cultural teams.

　　Must demonstrate solid communication skills.

　　Qualifications

　　Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

　　Qualifications:

　　Master's or Ph.D. in Electrical Engineering, Physics or Materials Science major. Ph.D. degree is preferred. Other related science and engineering degrees can be considered based on industry experience.

　　10+ years of engineering experience in advanced node semiconductor industry in Device Integration engineering.

　　5+ years of engineering experience in FinFET technology development or high-volume manufacturing. Experience in GAA (Gate-All-Around) technology architecture is preferred.

　　Working knowledge in module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.

　　Hands-on experience in serving external Foundry customers through technical interactions.

　　Problem-solving and project/program management experience with strong self-initiative and self-learning capabilities.

　　Proven track record of working across organizations through matrix structures to accomplish strategic objectives with conflicting priorities.

　　Must demonstrate strong communication skills.

　　Hands-on experience in new semiconductor technology development is strongly preferred.

　　Posting Statement

　　All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

　　Benefits

　　We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

　　Position of Trust

　　This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.