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Design Quality and Reliability Engineer
Design Quality and Reliability Engineer-October 2024
Hillsboro
Oct 13, 2026
ABOUT INTEL
Intel creates world-changing technology that enriches the lives of every person on earth.
10,000+ employees
Technology
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About Design Quality and Reliability Engineer

  Job Description

  Design Quality and Reliability Engineers working on TFM (Tools, Flows and Methodologies) innovate strategic TFM solutions to enable pre-Si quality and reliability validation for integrated circuits. In this position, you will be part of a Pre-Si QnR TFM group setting methodologies and driving TFM solutions in various areas of circuit reliability validation and governance of SOCs and Hard IPs on leading edge process technology nodes.

  This internship will focus on software tools supporting the design of integrated circuits.

  The Design Quality and Reliability Engineer will be responsible for but not limited to:

  Work with a team that owns the responsibility of designing integrated circuits

  Modifying code of existing design software tools to enhance features

  Debug and validate respective software code and/or developing new design tool capabilities for design data analysis.

  Support of executing simulation tools to verify compliance of integrated circuits to design and process rules.

  At Intel, we constantly push the boundaries of innovation to make people's lives more fulfilling, exciting, and easier to manage. It starts with the chip and ends with a world of opportunity. As an Intel intern, you have the opportunity working directly with process, product design and development. You're a critical player in taking a product to production ramp.

  This position is not eligible for Intel immigration sponsorship.

  Qualifications

  You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.

  Minimum Qualifications:

  Candidate must be pursuing a MS or PHD in Computer Science (CS), Electrical and Computer Engineering (ECE) or related field.

  Demonstrated experience in the Unix or Linux OS environment.

  Demonstrated experience in PERL and PYTHON.

  Demonstrated GitHub (GIT) or a distributed version-control system for tracking changes in source code during software development.

  Preferred qualifications:

  Fundamental understanding or VLSI circuit design and semiconductor technology.Inside this Business Group

  As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

  Posting Statement

  All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

  Benefits

  We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

  Working Model

  This role will require an on-site presence.

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