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Server Platform Debug HW Architect
Server Platform Debug HW Architect-May 2024
Bengaluru
May 2, 2025
ABOUT INTEL
Intel creates world-changing technology that enriches the lives of every person on earth.
10,000+ employees
Technology
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About Server Platform Debug HW Architect

  Job Description

  Come and join a dynamic and challenging team within the Intel Data Center and AI Group (DCAI) focused on developing and supporting world class platforms and component building blocks aligned to roadmap and strategies. Our mission is to enable breakthrough innovation for cloud computing in Intel's Data Platform Engineering and Architecture group (DPEA)The Data Center Group Platform Architecture team is seeking an experienced, self-motivated candidate to fulfill the role of Server Platform Architect focusing on Platform Debug Infrastructure. As a Platform Hardware Architect focusing on the debug Infrastructure (aka bare metal) across all Data Center Group Platforms, your multi segment responsibilities will include:Lead or contribute to the development of new debug interfaces, use models and complete technical readiness for these technologies.Contribute to or define future platform debug architecture conceptsComprehend production use models as well as requirements for HVM all in the effort of higher qualityProvide deep analysis and recommendation in specific subsystem architecture areas in support of broader platform debug definitionSupport product business and planning teams to complete product feature freeze and final architecture definitionEngage in customer discussions to obtain feedback on specific features or technologiesDrive the platform architectural definition and document the full architecture in the Debug Platform Architecture SpecificationSupport design engineering teams in product development phase as well as representing platform architecture issues exposed in design, validation, and test.

  Qualifications

  You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a positive factor in identifying top candidates. Requirements listed may be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

  Minimum Requirements:

  The candidate must have a Bachelor's degree with 9+ years of industry experience or Master's degree with 6+ years of industry experience in Computer Engineering, Electrical Engineering or related field.

  Minimum qualifications:

  5+ years of experience with:Debug experience at platform level and/or component level, this could be software and/or hardware.

  Debug tools in Lab/Production environments.

  Technical domains such as SoC Architecture, Memory, RAS (reliability, accessibility, serviceability), and/or PCIe.

  Preferred qualifications:Experience with Intel XEON processor architecture focusing on DFx use cases including early break/patch, security levels etc.

  Experience with server system architectures including closed chassis, open chassis, scale up, and scale out debug.

  Experience with debug infrastructure utilized in the industry (JEDEC, IEEE, MIPI).

  Security technologies such as authentication, cryptography, secure protocols, etc.

  Platform/SoC architectures focusing on debug technologies such as At-Scale Debug, Direct Chassis DCI, ITP-XDP/Lauterbach, MIPI-PTI , JTAG, SMBus/I2C/I3C) as well as customer specific tools (Asset, Green Hill).

  Inside this Business Group

  The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

  Posting Statement

  All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

  Benefits

  We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

  It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

  Working Model

  This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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