Type: Full-Time

　　Location: Huntsville, AL

　　Position Description:

　　This opening is for ASIC design engineers with layout experience. Radiance Technologies, a rapidly growing employee owned company supporting multiple technology development efforts is searching for analog/mixed signal designers with place and route experience to join the Advanced Technology Development Operation in the Cyber Solutions Group. We are looking for a self-starter with excellent technical skills drawing from a number of Electrical Engineering technical skillsets to support the development/prototype phase of multiple projects. Flexibility is a must, as our tasks include a wide variety of topics in support of our mission: innovative design techniques, hardware security, rad-hard systems, foundry process qualification and functional and physical verification. Responsibilities will include documentation of progress, effective communication, and presentation of results and progress. Experience working with electronic design automation tools is a requirement. The hired candidate will work with a small team on tasks that range from developing briefing charts describing proposed concepts to the customer to hands-on design from transistor to system level. Ideal candidates will have an M.S. or PhD in Electrical Engineering. Experience with IC design and layout software (e.g. Mentor, Cadence, or Tanner environments) as well as VHDL, Verilog, and SPICE modeling and design is required.

　　Required Skills:

　　Bachelors degree in Electrical Engineering or relevant technical field

　　US citizenship with the ability to obtain a security clearance

　　Required Experience:

　　ASIC design experience with Mentor, Cadence, or Tanner toolsets and VHDL or Verilog simulation and design.

　　10 years of relevant hardware experience

　　Desired Qualifications:

　　Masters or PhD in Electrical Engineering or relevant technical field

　　Experience with Embedded and Hardware Design

　　Experience with ASIC Design, Simulation, and Modeling

　　Experience with FPGA programming (VHDL, Verilog)

　　Experience with asynchronous gate design for improved radiation hardening

　　Self-motivated yet able to work well within a development team

　　5 years of ASIC design experience

　　Clearance:

　　Applicants selected may be subject to a government security investigation and must meet eligibility requirements for access to classified information.