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Product Development Engineer - Testchip Post-Si execution
Product Development Engineer - Testchip Post-Si execution-October 2024
Folsom
Oct 30, 2025
ABOUT INTEL
Intel creates world-changing technology that enriches the lives of every person on earth.
10,000+ employees
Technology
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About Product Development Engineer - Testchip Post-Si execution

  Job Description

  Do Something Wonderful!

  The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people’s digital lives. Come join us and do something wonderful!

  Who We Are

  Come join the fast-paced and ever innovative area of Test Chip manufacturing and validation under the Design Engineering Group at Intel! We work on the latest IPs and process nodes across Intel’s portfolio.

  Who You Are

  Drives and develops testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Contributes to design, development, and validation of testability circuits, test flows, and methodologies for new products through evaluation, development, and debug of complex test methods. Interfaces with process development, fab, factory, assembly, quality and reliability, and manufacturing groups to enable post-silicon HVM ramp. Evaluates new designs on automatic test equipment (ATE) and works with the design, DFx, and product development teams to debug functionality and performance issues to root cause. Performs ATE device characterization, utilizes that data to define datasheet specifications and performs yield analysis. Collaborates with designers to drive design for test/debug/manufacturing (DFT/DFD/DFM) features enabling efficient production testing of new products. Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions. Tests, validates, modifies, and redesigns circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Ensures manufacturability over process and product design through thorough analysis of process and spec corners and works with design to resolve yield issues before manufacturing ramp. Drives test time reduction through analysis of fallout data versus test time for various IPs to balance and drive overall product cost optimizations. Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Leads and drives manufacturing readiness from fab, assembly, and test factory to support engineering sample and customer sample generation (ES milestones), wafer start planning, product qual execution strategy and capacity analysis, and assembly and test site certification activities. Works with fab, assembly, and test factory partners and planners to support production ramp. May also manage execution of new product introductions in the fab, fab process targeting, product/process optimizations, and participate in factory task forces to bring product perspective and respond to product issues. Optimizes product supply through data analysis of postsilicon binsplit, die level cherry pick (DLCP), and optimize sort/test content and yield downstream through data analysis.

  Qualifications

  Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

  Minimum Qualifications :

  Possess a Bachelor of Science Degree in Electrical Engineering or equivalent with at least 4 years of applicable experience in SOC analog/logic validation and characterization OR a Master’s of Science Degree in Electrical Engineering or equivalent with at least 3 years of applicable experience in SOC analog/logic validation AND

  4+ years of microprocessor test (ATE and/or system test and/or pre-silicon verification) experience

  4+ years of applicable experience in analog/logic/array/functional validation in post-Si/MFG (and/or pre-Si)

  4+ year experience in DFT/DFD, hardware testing methods and tools

  4+ year experience with hardware language (Verilog/SV) and scripting language (Perl/Python)

  Preferred Qualifications:

  4+ years of experience/knowledge in:

  Circuit design/Si process/test domains

  Memory BIST (MBIST), SSA memory architecture, LSA memory architecture, Array Redundancy, and Cache Repair

  Scan architecture, Stuck-At scan, At-Speed scan

  Background in ATE, automated test equipment

  Background in test program and content development tools/methods/flows

  Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

  Inside this Business Group

  Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.

  Posting Statement

  All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

  Benefits

  We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

  Annual Salary Range for jobs which could be performed in US, California: $105,797.00-$175,105.00

  *Salary range dependent on a number of factors including location and experience

  Working Model

  This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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