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Principal Silicon Engineer
Principal Silicon Engineer-March 2024
Santa Clara
Mar 28, 2026
About Principal Silicon Engineer

  Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high-energy engineers to help achieve that mission.

  Are you seeking an opportunity to work on delivering silicon solutions that have a planet-scale impact? The Data Processing Unit (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Principal Silicon Engineer. You will join our front-end silicon team and be responsible for delivering cutting-edge, high performance, low power, scalable and programmable DPU silicon.

  Responsibilities

  As a Principal Silicon Engineer in the Data Processing Unit team you will be validating silicon to solve complex problems in a datacenter.

  Interact with the software team to co-develop a programmable silicon implementation.

  Solve complex engineering problems utilizing your technical experience

  Acts as an resource to others on matters related to industry trends, competitor products, the customer experience, and advances in various engineering. Shares and acquires knowledge of deep technical areas, or across multiple domains within their team and across teams working on similar products.

  Monitors project progress/status updates across multiple project teams, anticipates potential challenges, and shares details with key stakeholders as necessary (e.g., proactively resolve design issues, acquire resources, ensure best practices are shared, or identify feasible alternatives).

  Qualifications

  Required/Minimum Qualifications

  9+ years of related technical engineering experience

  OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience

  OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience

  OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.

  8+ years of Register Transfer Level design and/or architecture experience

  Other Requirements

  Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.Additional or Preferred Qualifications

  15+ years technical engineering experience

  OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience

  OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience

  OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience.

  Track record with the definition and development of complex Sytems on chip.

  In depth understanding of processors and peripheral interconnect bus protocols and architectures

  High performance (low latency, high bandwidth) design techniques

  Understanding of low power microarchitecture techniques. knowledge of Verilog, System Verilog, Synthesis and Static Timing Analysis

  Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $133,600 - $256,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $173,200 - $282,200 per year.

  Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

  #azurehwjobs

  Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (https://careers.microsoft.com/v2/global/en/accessibility.html) .

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