Description:

　　Our client is looking for a FPGA Engineer to join their Space Electronic Systems group. This group specializes in performing circuit board design for different space applications, including both individual board designs and system level electrical designs. This person will be part of a group delivering cutting-edge solutions for DoD, Intel, and Space customers.

　　Responsibilities:

　　• Work within a multi-discipline team of engineers to design Software Defined Radios (SDRs), On-Board Processors (OBPs) and storage solutions for space applications utilizing the latest Xilinx technologies (e.g., Zynq Ultrascale+ MPSoC, Zynq Ultrascale+ RFSoC, and the VERSAL ACAP)

　　• Create and maintain complete FPGA designs using a combination of VHDL and Vivado IP Integrator with a strong emphasis on efficient data path architecture, reliable timing closures, and high-performance implementations

　　• Code, simulate, and verify a wide range of RTL modules for FPGAs including modules for digital signal processing (DSP), control algorithms, interfaces to external peripherals, etc.

　　• Design and implement solutions that use embedded ARM processors, DDR4 memories, high-speed serial interfaces such as Aurora, JESD204B/C, PCIe, 1G/10G/40G Ethernet, etc.

　　• Create and maintain comprehensive simulation test bench modules to ensure a high degree of code coverage and verify functionality of firmware modules

　　• Create and maintain Timing Constraints to ensure design is fully constrained and consistent Timing Results are achieved post-implementation

　　Skills:

　　Xilinx, vhdl, simulation, modelsim, dsp, matlab, matlab simulink, linux, c/c++, verilog, systemverilog, vivado

　　Additional Skills & Qualifications:

　　Required:

　　• BS in computer/electrical engineering with a focus on embedded firmware design

　　• 3-6 years of experience of firmware design, simulation, and verification

　　• An understanding of FPGA design methodologies including physical synthesis, static timing analysis, formal verification, power analysis, and other DRC centric tools

　　• Experience working with Xilinx FPGAs and the Vivado Design Suite

　　• RTL coding experience using VHDL

　　• Experience writing simulation testbenches to identify bugs and verify designs

　　• Experience with board bring-up/verification and writing constraints for timing verification

　　Preferred Experience:

　　• Modelsim/Questasim and/or Aldec simulation tools (Riviera PRO)

　　• Simulation verification libraries such as UVVM, UVM, OVM, etc.

　　• Digital Signal Processing (DSP)

　　• Revision control systems, such as Git

　　• MATLAB and Simulink

　　• MATLAB HDL Coder

　　• Linux

　　• C/C++

　　• Verilog

　　• SystemVerilog

　　Experience Level:

　　Intermediate Level

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