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Design Verification Engineer (Silicon Engineering)
Design Verification Engineer (Silicon Engineering)-March 2024
Redmond
Mar 28, 2026
About Design Verification Engineer (Silicon Engineering)

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING)At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.RESPONSIBILITIES:Responsible for digital ASIC and/or FPGA verification at block and system levelWrite and review test plans, develop test harnesses and test sequencesDevelop SystemVerilog testbench infrastructure (both UVM and non-UVM) for testing designs, including DSP blocksResponsible for test plan execution, running regressions, code and functional coverage closureAutomate test case generation by using Python and MATLAB programsContribute towards pre-silicon verification, chip bring-up and post-silicon validationBe a hands-on self-starter who can execute the steps required to fully verify a complex digital designsBASIC QUALIFICATIONS:Bachelor's degree in electrical engineering, computer science or computer engineering2+ years of experience with design verification and test bench developmentPREFERRED SKILLS AND EXPERIENCE:Advanced degree in electrical engineering or computer engineeringExperience with verification methodologies such as UVMStrong object-oriented programming knowledgeStrong problem-solving and coding skillsExperience in constrained random verificationExpertise in developing test plans, implementing coverage models, and analyzing resultsExperience with scripting languages, e.g. Python for automationRTL design, chip bring-up, and post-silicon validation experienceAbility to work in a dynamic environment with changing needs and requirementsADDITIONAL REQUIREMENTS:Must be willing to work extended hours and weekends as neededCOMPENSATION AND BENEFITS:Pay range:Design Verification Engineer/Level I: $120,000.00 - $145,000.00/per yearDesign Verification Engineer/Level II: $140,000.00 - $170,000.00/per yearYour actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Sto

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