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ASIC Engineer, Architecture
ASIC Engineer, Architecture-June 2024
Bangalore
Jun 24, 2026
ABOUT META
We’re building a team as diverse as the communities and billions of people we serve every day. Our teammates don’t need to conform here. Lived experiences are an asset, and we value your unique perspe
10,000+ employees
Social Media, Technology
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About ASIC Engineer, Architecture

  Summary:

  Meta is seeking an ASIC Engineer, Architecture to join our Infrastructure organization. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our innovative services are delivered. By holding this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers to scale efficiently. You will have an opportunity to work with AI/Machine Learning (ML) experts in the company, help architect state-of-the art machine learning accelerators, and contribute to modeling these accelerators. Come work and learn alongside our expert engineers to build “Green” data center accelerators.

  Required Skills:

  ASIC Engineer, Architecture Responsibilities:

  Work on advanced architecture, algorithms and models targeting Machine Learning solutions.

  Analyze and map data center workloads to ASIC architecture, as well as develop performance and functional models to validate the architecture.

  Implement and analyze algorithms and enhanced architecture for the data center Machine Learning accelerators.

  Implement various models needed for the validation of the accelerators.

  Create Machine Learning kernels to analyze the ASIC Architecture, and make the architecture optimal for ML workloads.

  Minimum Qualifications:

  Minimum Qualifications:

  Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

  More than 10 year of experience and knowledge of Computer Architecture concepts such as processor architecture, memory systems and on-chip interconnection networks.

  Programming experience in C, C++ or related Object Oriented Programming.

  Preferred Qualifications:

  Preferred Qualifications:

  Master’s or PhD degree in Electrical Engineering, Computer Engineering or related areas.

  Experience driving power and performance trade-offs in ASIC Architecture.

  Experience and knowledge in Machine Learning Silicon architectures.

  Knowledge of Machine Learning kernel development.

  Industry: Internet

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