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Senior Principal Analog Design Engineer (SERDES)
Senior Principal Analog Design Engineer (SERDES)-March 2024
Dublin
Mar 29, 2026
About Senior Principal Analog Design Engineer (SERDES)

  At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise . The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

  At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  Job Title: Senior Principal Analog Design Engineer (SERDES)

  Location: Cork/Dublin

  Reports to: Group Director

  Job Overview:

  The Cadence Serdes PHY team based at our R&D center of excellence in Cork, is seeking ambitious analog designers who wish to work on the leading edge of Wireline technology at the highest data rates (112Gbps+) and on the smallest technology nodes ( e.g. 3 nm ) .

  The PHY team designs products for communication protocols such as PCIe (now at Gen 7) and UCIe (emerging Chiplets standard).

  The Senior Principal Analog Design Engineer will take a Technical Leader ship role on the PMA design team as part of a SERDES Product Team .

  Job Responsibilities:

  Design of High Speed SERDES products at data rates up to and exceeding 112 Gbps on leading edge technology nodes (e.g. 3nm FinFET CMOS)

  Design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications

  Work closely with Physical Design Engineers to design IC circuit blocks and PMA sections

  Participate in technical leadership of the team in the areas of circuit design and SERDES architectures

  Work with global teams (US, west coast and east coast), which work in different time-zones

  Job Qualifications:

  Candidate’s background should include a minimum of 7 years of experience in CMOS SERDES or high-speed I/O IC design and development

  Working knowledge of a set of common SERDES standards and their electrical requirements

  Must have a thorough understanding of jitter and signal equalization techniques

  Proficient design experience in many of the following SERDES circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators

  Excellent problem-solving skills, analog aptitude, good communication skills and ability to work cooperatively in a team environment

  BEng, MEng or PhD

  Additional Skills/Preferences:

  Cadence tool experience and design experience at >10Gbps and in <40nm technologies

  Lab test experience as part of silicon evaluation is advantageous

  Interest in publishing academic papers and presenting at conferences e.g. ISSCC, JSSC

  We’re doing work that matters. Help us solve what others can’t.

  Additional Jobs (https://cadence.wd1.myworkdayjobs.com/addl_jobs)

  Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

  Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. 
Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

  Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

  Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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