Please Note:1. If you are a first time user, please create your candidatelogin accountbefore you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:
Candidate would be required to work on modeling and Design Implementationactivities related to complex digital and mixed signal IP blocks used in thedevelopment of Broadcom's ASIC / SoC products. Activities includedevelopment, verification, and deployment of models for emulation andsimulation, design-for-test (DFT), and timing analysis. Required tomaintain integration guides and release notes used with the deployment of IP.Assemble, audit, and release packages consisting of logical and physicalviews to support ASIC developments. Additionally, the candidate would berequired to do block-level synthesis, verification (functional,static, formal), and timing analysis. Candidate will work closely withthe IP design teams to accomplish the modeling and design implementationactivi
The engineer will work with the internal ASIC / SoC teams and Broadcomcustomers to support integration, simulation, DFT, synthesis, timinganalysis and closure, and physical implementation involving the IP blocks.
Contribute to maintaining IP integration and user guides for supportingchip-level functions such as IP integration, RTL and gate-levelverification, synthesis, design-for-test (DFT), synthesis,physical layout, timing analysis, and manufacturing testing.
Assist in analyzing and debugging customer problems involving the use of theIP models.
Will be exposed to various IP and ASIC / SoC developments.
Opportunities for customer interaction and other high profile activities areavailableto members of this team.
In this role, the candidate will apply Broadcom's proven modeling anddesign methodology and milestone flow to meet Broadcom's rigorous criteriafor achieving Right-first time silicon.
Requirements:
Candidate should have experience with functional verification, synthesisand/or timing (constraints, STA), static and formal verification.
Experience with functional verification using Verilog/SystemVerilogincluding advanced verification concepts and methodologies (e.g., UVM).
Experience with constraints development, constraints validation, andtiming analysis.
Experience with tools such as VCS/Xcelium, Zebu/Palladium/Veloce,Design Compiler, PrimeTime, Formality/LEC.
Experience with Perl/Python and Tcl.
Good problem solver and must have an appreciation for version control anddeveloping, maintaining, and using automated processes where applicable.
Capable of working independently and experienced in working in a global teamand dynamic environment.
Should possess ability to learn and adapt to new tools and methodologies onthe fly. Possess excellent communication skills.
Hands on experience with timing analysis and place and route tools for blocklevel / ASIC / SoC is a plus.
Education and Experience required:
BS in Electrical Engineering / Computer Engineering or related field and8+ years of related experience or an MS in Electrical Engineering /Computer Engineering or related field and 6+ years of related experience.
Additional Job Description:Compensation and BenefitsThe annual base salary range for this position is $91,200 - $178,000.
This position is also eligible for a discretionary annual bonus in accordancewith relevant plan documents, and equity in accordance with equity plandocuments and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical,dental and vision plans, 401(K) participation including companymatching, Employee Stock Purchase Program (ESPP), Employee AssistanceProgram (EAP), company paid holidays, paid sick leave and vacationtime. The company follows all applicable laws for Paid Family Leave and otherl
Broadcom is proud to be an equal opportunity employer. We will considerqualified applicants without regard to race, color, creed, religion,sex, sexual orientation, gender identity, national origin,citizenship, disability status, medical condition, pregnancy,protected veteran status or any other characteristic protected by federal,state, or local law. We will also consider qualified applicants with arrestand conviction records consistent with local law.
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