Kforce has a client that is seeking an Engineering Design Manager-FPGA in Chandler, AZ. We are working directly with the Hiring Manager on this search assignment. The company offers a competitive compensation package including base salary and profit sharing.Responsibilities:

　　Engineering Design Manager-FPGA will manage a matrixed team of up to 10-12 (possibly more)

　　Provide technical support and knowledge

　　Select engineering tools

　　Drive improvements in design processes

　　Mentor and encourage new engineers

　　Lead fault analysis team

　　Allocate engineering personnel

　　Review circuit analysis and board level designs

　　Ensuring engineering team adheres to the required policies and processes

　　As an Engineering Design Manager-FPGA, you will foster a culture of enjoying engineering design

　　Review electrical schematics/layouts

　　Review FPGA designs

　　Attend design reviews

　　Provide engineering feedback to design architectures

　　Encourage teamwork

　　Provide team members the correct tools for the job

　　Measure and report progress toward on-time delivery goals

　　Ensure the design project meets internal and customer requirements by ensuring adherence to the required policies and procedures

　　Bachelor's degree in Electrical Engineering, Computer Engineering, Physics or similar field

　　10 or more years of design and development in FPGA design

　　Strong experience in VHDL and/or Verilog coding and how to optimize for performance

　　Previous experience designing test benches and simulations using digital simulation tools (example ModelSim, Active-HDL) for verification of FPGA designs is a plus

　　Previous experience in power dissipation, power use, timing, signal integrity, component derating, and Acceptance Test/Built-In Test coverage

　　Digital design experience in some of the following: modern microprocessors/DSPs, high speed digital logic, FPGA, memory, analog-to-digital, digital-to-analog converters, and communication links

　　Analysis expertise including power dissipation, power consumption, timing, signal integrity, component derating

　　Knowledge of board design and layout including design tools is a plus but not required

　　Experience leading and managing a team of design engineers is highly desired

　　The pay range is the lowest to highest compensation we reasonably in good faith believe we would pay at posting for this role. We may ultimately pay more or less than this range. Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future.

　　We offer comprehensive benefits including medical/dental/vision insurance, HSA, FSA, 401(k), and life, disability & ADD insurance to eligible employees. Salaried personnel receive paid time off. Hourly employees are not eligible for paid time off unless required by law. Hourly employees on a Service Contract Act project are eligible for paid sick leave.

　　Note: Pay is not considered compensation until it is earned, vested and determinable. The amount and availability of any compensation remains in Kforce's sole discretion unless and until paid and may be modified in its discretion consistent with the law.

　　This job is not eligible for bonuses, incentives or commissions.

　　Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.

　　Compensation Type:YearsMinimum Compensation:160000.00Maximum Compensation:185000.00